Discussion

LT6502b

ksimukka: Amazing

artemonster: Imagine in steampunk fashion wed get an alternative future timeline where computer tech froze in 80s due to some physical limitation that prohibited shrinking transistors. all typical laptops would have same config as this awesome project. what would the society become?

voidUpdate: I believe the actual silicon of a 6502 is much smaller than the DIP package, so even if we couldn't shrink the silicon itself much more, you could just take up more space inside the package, and use a package that has more pins in it, like current CPU designs. You would probably hit a bottleneck at some point since I believe the speed of light is a problem for processing speed at some point, but then I'd expect we'd just go into massively parallel systems, with multiple cores acting somewhat individually

sublinear: Laptops would be a lot less common. If computers were stuck in this era for that long, fewer people would be interested. Prices would be high.

forinti: I was thinking lately about how much memory you could handle on a 6502. The BBC Micro had a 16KB block of RAM paged between up to 16 ROMs/RAM but if you could have 256 banks you could do 4MB. The only problem is that that would require a very large PCB.It could be useful for some sort of minicomputer for business applications.

veltas: Okay what if something else had prevented something better than a 6502 being mass market available?

Joker_vD: Depends entirely on what banking scheme you use. Nothing stops you from adding e.g. an 8-bit banking register (even two of them, one for instruction fetches, another one for normal memory reads/writes) to serve as bits 23–16 for the 24-bit memory bus. That's what WDC 65C816 from 1985 does, but it also goes full 16-bit mode as well.And if you have a 16-bit CPU, you can do all kinds of silly stuff; for instance, you can have 4 16-bit MSRs, let's call them BANK0–BANK3, that would be selected by the two upper bits of a 16-bit address, and would provide top 16 bits for the bus, while the lower 14-bits would come from the original address. That already gives you 30 bits for 1 GiB of addressable physical memory (and having 4 banks available at the same time instead of just 2 is way more comfortable) and nothing stops you from adding yet another 4 16-bit registers BANK0_TOP–BANK3_TOP, to serve as even higher 16 bits of the total address — that'd give you 16+16+14 = 46 bit of physical address (64 TiB) which is only slightly less than what x64 used to give you for many years (48 bits, 256 TiB).

voidUpdate: the 6502 package would probably shrink to use something like a BGA package, and you could probably make some kind of "multicore" system using 6502 processors. I'm not knowledgeable enough to say how feasible that would be, but you could probably use something with shared memory regions to pass data between them and run code in parallel.If you are absolutely limited to 6502 DIP chips, there would probably be more prevalence of large mainframe systems and single 6502-based "terminals"/"thin clients". The mainframes could use systems similar to the Transputer or the Connection Machine to use large amounts of (comparatively) low-power processors to make a single, more powerful computer. They both used custom processors, with the Connection Machine in the early 80s and the Transputer in the late 70s. You could probably reasonably easily create a "graphics card" style system, comprised of many 6502 cores in a SIMD configuration.I don't know how easy it would be to implement wifi or ethernet with only 6502 chips, so communications with the mainframe might be quite slow

zabzonk: > Imagine in steampunk fashionSee The 8-bit Guy regarding what the world would be like if we were still limited to vacuum tubes: https://www.youtube.com/watch?v=mEpnRM97ACQ (video)

forinti: I was trying to get a grasp on what would be pratical.Even 4MB would take you hours to load from floppies with a 6502.Terabytes with a 68000 would also be impractical.

Joker_vD: > Even 4MB would take you hours to load from floppies with a 6502.Depends on your clock. Also, you could use some dedicated hardware, like a DMA controller e.g. 8257, or 8237. From 8257's datasheet: Speed The 8257 uses four clock cycles to transfer byte of data. No cycles are lost in the master to master transfer maximizing bus efficiency. 2MHz clock input will allow the 8257 to transfer at rate of 500K bytes/second. and I recall 8237 could do even better, if wired and programmed properly.

bluGill: Hard drivers were available for the 6502. They were expensive ($10k for a 10MB drive as I recall prices came down a lot, but never affordable in the 1980s)Processing terabytes with a single CPU was impractical, but you could in theory connect it.